This invention relates generally to electrical time delay circuits and more particularly, it relates to a CMOS gate having a programmable driving power characteristic so that its propagation delay time can be varied by digitally selected control signals.
Heretofore, there are known in the prior art conventional delay line circuits formed of inductances, capacitances and resistances to control the desired time delay. Further, there also exists prior art delay line circuits of the type which utilize electronic circuitry such as inverters and logic circuits so as to control the time delay. However, such conventional delay lines generally do not have the capability of being programmable so as to allow the user to vary or change the amount of time delay.
As is generally know, a conventional CMOS inverter may be used to form a delay element and is comprised of a P-channel MOS transistor and an N-channel MOS transistor. The gates of the P-channel and N-channel transistors are connected together so as to define the input of the inverter, and the drains thereof are connected together so as to define the output of the inverter. The source of the P-channel transistor is connected to a power supply voltage or potential VDD, and the source of the N-channel transistor is connected to a ground potential VSS. When an input having a predetermined waveform is applied to the input of the inverter, an output signal appearing at the output of the inverter is delayed.
This propagation delay of the CMOS inverter gate is normally dependent upon the ratio of its driving capability to the loading connected to its output. For example, when the load is capacitive the delay is due to the charging and discharging of the capacitor. Thus, if the driving power of the CMOS inverter gate is high, the propagation delay will be small. On the other hand, if the driving power of the CMOS inverter gate is small, the propagation delay will be large.
It would therefore be desirable to provide a CMOS gate whose propagation delay time is capable of being easily programmable by users. Further, it would be expedient to have the amount of time delay being varied or controlled by digitally selected control signals. The present invention may be implemented in a variety of circuit applications. Such applications include, but are not limited to, programmable delay lines and ring oscillators.